TENURED PROFESSOR
Javier Ferney
Ardila Ochoa
School of Electrical, Electronics and Telecommunications Engineering
Position 1
Position 2
CONTACT
Information
jardilao@uis.edu.co
+57 (607) 634 4000 Ext. 1468
GENERAL
Biography
Ph.D. in Engineering with a specialization in integrated circuit design. He has extensive expertise in design flow and techniques for both analog and digital integrated circuits, with industry experience in ASICs for automotive and industrial applications, as well as practical knowledge of various CMOS process nodes (from 22nm to 180nm) acquired through work with leading semiconductor companies.
He holds a Summa Cum Laude degree in Electronic Engineering and is a specialist in integrated circuit design from the Cadence IC Brazil Program. As an active member of the Integrated Systems Research Group – Onchip, he has authored and co-authored numerous publications in IEEE conferences and journals and holds a patent in the field of integrated circuits. Additionally, he has served on technical program committees for IEEE CAS conferences and as a reviewer for the IEEE Transactions on Circuits and Systems journal.
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His research interests include circuit and VLSI design, power management circuits, high-speed serial interfaces, SerDes block design, clock and data recovery circuits and techniques, and analog and mixed-signal circuit design.
EDUCATION AND
Qualifications
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Ph.D. in Engineering
Universidad Industrial de Santander, 2021
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Electronic Engineer
Universidad Industrial de Santander, 2010
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Especialista en Docencia Universitaria
Universidad Industrial de Santander
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Fisioterapeuta
Universidad Industrial de Santander
Position 1
Position 2
CONTACT
Information
jardilao@uis.edu.co
+57 (607) 634 4000 Ext. 1468
AREAS OF
Expertise
Microelectronics and integrated circuit design
High-speed communication interfaces
Mixed-signal circuits
Computer architecture
OFFICE
Hours
Monday to friday
7:00 a.m. – 12 m.
2:00 p.m. – 5:00 p.m.
UIS Campus Central, Edificio de Ingeniería Eléctrica
Outstanding
Works
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On the Cross-Correlation Based Loop Gain Adaptation for Bang-Bang CDRs
Article, IEEE Transactions on Circuits and Systems I: Regular Papers, 2020
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A 32-bit RISC-V AXI4-lite Bus-based Microcontroller with 10-bit SAR ADC
Conference, IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 2016
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A Stable Physically Unclonable Function Based on a Standard CMOS NVR
Conference, IEEE International Symposium on Circuits and Systems (ISCAS), 2020
AWARDS AND
Recognitions
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Meritorious Doctoral Thesis
Universidad Industrial de Santander
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Electronic Engineer, Summa Cum Laude
Universidad Industrial de Santander
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Nombre del reconocimiento
Identidad que lo otorga, año